Naoto Horiguchi is a director of the logic device scaling program at imec, Leuven, Belgium. He started his career in semiconductor device R&D at Fujitsu Laboratories Ltd. in 1992. From 1992-1999, he was engaged in device development by using semiconductor nano structures at Fujitsu laboratories Ltd. and University of California, Santa Barbara. From 2000 to 2006, he was engaged in 90-45nm CMOS technology development at Fujitsu Ltd. as a lead integration engineer. Since 2006, he is with Interuniversity Microelectronics Center (IMEC), Leuven, Belgium, where he is engaged in advanced CMOS device R&D together with worldwide industrial partners, universities and research institutes. His current focus is CMOS device scaling down to the 2nm technology node and beyond. He holds more than 20 international patents and authored or co-authored more than 300 technical papers and international conferences.