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Carey Kloss

VP Artificial Intelligence Products Group, and General Manager of Artificial Intelligence Hardware
Intel

 Carey K. Kloss is vice president in the Artificial Intelligence Products Group and general manager of artificial intelligence (AI) hardware at Intel Corporation. He has overall responsibility for the group’s Intel® Nervana™ AI hardware products, which include the family of chips code-named “Crest.” Kloss and his team work on multiple aspects of the products, including program management, digital intellectual property design and verification, system software, and software quality assurance. A specialist in deep learning technology and hardware development, Kloss rejoined Intel in 2016 with the acquisition of Nervana Systems. Before assuming his current role in 2017, he served as senior director of hardware in the Intel Nervana group, with responsibility for the Crest family of deep learning training products. Previously, as vice president of hardware at Nervana, he led development activities for the company’s deep learning products, a role that encompassed team management as well as technical work on chip architecture and design verification. Before joining Nervana in 2014, Kloss spent eight years at semiconductor company Aquantia Corp., culminating in his role as senior director of program management and verification. His tenure at Aquantia included managing the relationship with Intel that resulted in a 10GBaseT LAN-on-motherboard chip, which was widely recognized as an industry first. Earlier in his career, Kloss worked at Cisco Systems Inc., AuroraNetics Inc. and PLX Technology. He began his career at Intel in 1997 as a CPU architect, then left after two years to join startup Sebring Systems. Kloss holds bachelor’s and master’s degrees in electrical and computer engineering, both from Carnegie Mellon University. He has been named on a number of pending patent filings in recent years related to his work at Nervana and Intel. He is also a published writer and frequent speaker on topics related to design verification and deep learning.

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