Technology Node Scaling Through Variation Control

TechTALKS Stage North Thursday, July 11
2:25pm to 2:50pm

While lithography has borne the burden of executing technology scaling, every device generation has been built upon fundamental process, device and integration innovations.  For example, the development of Rapid Thermal Anneal (RTA) processes facilitated high dopant activation and more abrupt device junctions, leading to closer packing of transistor source/gate/drain terminals.  The FinFET, a double-gated fully-depleted transistor structure, has delivered improved electrostatic control and allowed scaling to continue through use of shorter gate lengths.  Even NAND Flash has seen fundamental innovation, with the transition from planar 2D to multi-layer 3D devices, which has led to increased device density and “More than Moore” scaling.

Today, the list of these fundamental technology scaling innovations seems to be running thin.  Perhaps Gate-All-Around (GAA) structures will further advance gate length scaling, or 3D geometries like C-FETs will deliver increased logic device density as seen in the transition from 2D to 3D NAND Flash.  However, the single largest opportunity for scaling advantage may lie in an area rarely viewed as “fundamental innovation”.  Process and structural variations, or tolerances, have become a larger and larger component of dimensional scaling.  A substantial reduction in these variations, or the impact of these variations, may be the greatest available path to technology scaling today. The reduction of process variation has typically taken place as technology moves into high-volume manufacturing,  not during technology development.  Taking advantage of this opportunity will require a significant shift in how technology development occurs.

In this discussion, we will examine how process variation fits into the definition of technology scaling and why process variation is starting to dominate scaling dynamics.  Next, we will review opportunities for technology scaling purely through variation reduction, using novel processes, integration schemes and most importantly active process control.  Finally, we will discuss how technology development must change to take advantage of these additional
technology scaling opportunities.

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