SEMI International Standards Workshop:

Wafer Geometry Control for Advanced Semiconductor Manufacturing

July 9, 2014
San Francisco Marriott Marquis
Room: Golden Gate C2

The SEMI Standards Program got its start in 1973 through the industry-led development of the first standardized specification for 2" silicon wafers. Since that time, the Program has expanded into many additional fields, but wafers remain a key area of focus. Join this program to understand important developments and future needs in wafer geometry for advanced semiconductor manufacturing. Materials will be presented by authoritative customers, including IBM and Intel as well as key equipment companies. Proposals discussed during this workshop will be considered for standardization by the SEMI Standards Advanced Wafer Geometry Task Force under the Silicon Wafer Committee.



James Amano (SEMI) - Welcome


1:40pm Jaydeep Sinha [biography] (KLA-Tencor) - Introduction
Oleg Gluschenkov [biography] (IBM) : Monitoring Process-induced Wafer Distortions in Advanced CMOS nodes [abstract]


Joann Qiu [biography] (Intel) : Wafer Edge Roll-Off Characterization [abstract]

Kevin Turner [biography] (University of Pennsylvania) : 

Role of Process-Induced Wafer Geometry in Advanced Semiconductor Manufacturing [abstract]

3:30pm Q&A


by June 5
After June 5
SEMI Member $50 $50
Non Member $75 $75



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