SEMICON West 2013

 

Precision Materials to Meet FinFET Scaling Challenges Beyond 14nm

 

Speaker:

Adam Brand

Senior Director, Transistor Technology Group

Applied Materials

Abstract: 

 

To continue logic scaling at 14nm and beyond, structure enhancement and improved materials are needed.  Critical dimensions of the device structure need to scale, including gate length, device pitch, and contact CD.  Likely enhancements on the logic roadmap are a move to FinFET, improved FinFET implementation, high mobility channel, and gate all around (GAA) structures.  The increased complexity of the FinFET, high mobility channel, and GAA devices in combination with continued scaling requires more precision in structure formation and improved materials to address structure formation and parasitic effects.

 

The FinFET and GAA structures add to materials requirements through the need to form a scaled device structure and maintain fine features in a vertical dimension.  The fin formation key steps for maintaining the structural integrity are precision etch, void-free STI fill, recess and precisely tailored corner rounding through dummy gate oxidation.    In the gate structure formation an easily removed dummy gate material is needed, and precision CMP is required to control the dummy gate and replacement metal gate height.  Advanced CVD materials offer more choices in materials for differentiating selective removal.  Implant based precision material modification (PMM) has been effective in changing selectivity to obtain better structure control.

 

Another set of material challenges comes from the electrical requirements.   The evolution from doped channel to lightly or undoped fully depleted channel calls for tunable workfunction materials in the metal gate to meet the Vt tuning requirements common in mobile applications.    The 3-D structure adds complexity in strain related mobility enhancement.  Source/drain stressor shaping is needed to optimize strain and control unwanted increase in miller capacitance.  Lower K dielectrics are also needed to manage the miller capacitance.  Further mobility enhancement can come from advanced channel materials such as SiGe, Ge or InGaAs deposited through epi growth in the STI module.  These channel materials may be formed in a relaxed growth technique, or with strain to achieve still higher mobility.    Rising electrical performance at scaled gate pitch means the contact width will scale below the point where acceptable contact resistance is met by a traditional silicided interface.  This can be helped with implants to modify the metal/semiconductor interface and achieve lower contact resistance.

 


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