The TechSITEs at SEMICON West
NEW for 2010!
Building on the popularity of the TechXPOTs at SEMICON West, this year we're proud to introduce the new TechSITEs.
Where the TechXPOTs feature topical sessions focused on key industry segments, technologies, and trends, the TechSITEs will showcase a wider variety of topics in shorter sessions throughout each day of the show, including invited technical presentations and non-commercial exhibitor demonstrations.
Tuesday, July 13
10:30am-12:30pm |
Even before the economic downturn, test strategies by IDMs and outsource testing firms were dramatically being transformed by new test methodologies, multisite test, BIST, test optimization techniques, increasing reliance on structural test and other new approaches. These new technologies, processes and methodologies are still being developed and evaluated and will emerge with force during the next upturn, potentially altering the landscape for test engineers, suppliers, and customers. This session will provide insights into the new test strategies and test challenges by leading device makers, experts and OSATS. |
2:00pm-4:30pm |
3D-ICs with TSV interconnects are in the early phases of commercialization with the stage set for explosive growth. Image sensors have already ramped to high volume production. Early shipments of memory devices have now started. The advantages of deploying 3D-IC w/ TSV are clear; increased speed, lower power and higher density are the desired outcome. As the industry strives to reach these lofty goals, a few speed bumps have been encountered. One such struggle exists with the design tools that many of us have used for decades. 3D-IC w/TSV now requires additional attention to detail for semiconductor design and fabrication through package design and fabrication. This session will explore these new requirements and the issues that we’ve encountered that are slowing the successful adoption of high volume heterogeneous IC stacks. |
Wednesday, July 14
10:30am-12:30pm |
The current economic climate combined with the increasing dominance of consumer driven markets has created enormous pressures to lower the cost of test and develop new solutions to solve tough test problems. At the same time these cost pressures rise to new heights, advanced chip features, system functionality, performance goals, and package types have demanded continued innovation and advanced solutions in test. This session will explore the latest innovations in test technologies and ideas that meet today’s need for lower costs, system solutions and new test requirements. |
1:00pm-1:30pm |
The Best of West Award is given to recognize important product and technology developments in the microelectronics industries. The Best of West Award will provide maximum visibility and value to exhibitor winners, spotlighting exciting new products and technologies in front of a large global audience. For more information, click here. |
2:00pm-4:30pm |
The objective of the Intelligent Uses of Precious Metals in Microelectronics TechSITE is to have a unique forum that brings together scientists, engineers, manufacturers, academia, and business people from around the world who have been working in the area of Microelectronic packages and use Precious Metals in their applications. This workshop has been specifically organized to allow for the presentation and discussion of some of the best ways to economize and save cost with a valuable set of commodities. . |
Thursday, July 15
11:00am-3:00pm |
The Plasma Applications Group (PAG), a user group of the NCCAVS, is organizing a program featuring advances in Plasma Technology for processing of semiconductors and emerging applications such as biomedical, flexible technologies, LED, 3D packaging, and photovoltaics.
For information about NCCAVS, click here. |
Tuesday, July 13
10:30am-3:15pm |
Even as the world's largest IDMs anticipate the next node and wafer size transition, the vast majority of the industry sees opportunities in fab productivity, production flexibility and fab repurposing. Reducing cost, improving yield, increasing throughput, and expanding fab assets into "emerging" technologies and markets are just a few of the concepts that will be explored in these sessions. |
3:30pm-4:30pm |
Automation solutions are critical components in improving fab productivity and enabling other process improvements from wafer fab to final manufacturing. This session will focus on the latest developments in automation technologies and process integration, addressing the key challenges in implementing automation solutions in new and existing fabs. |
3:30pm-4:00pm |
Chris Ambrozic, MKS Instruments |
4:00pm-4:30pm |
Carl McMahon, Crossing Automation |
Moderator: |
John Rasberry, Novellus Systems |
Wednesday, July 14
10:30am-11:30am |
Counterfeit parts can have disastrous effects on tool performance and up-time. The SEMI North America Standards Traceability Committee has developed a suite of protocols for authenticating parts to ensure the tools are maintained using genuine consumables. Come see how you can avoid needless down-time. |
Elliott Grant, YottaMark | |
Dave Brown, Intel | |
11:30am-12:30pm |
The SEMICON West 2010 Sustainable Technologies Award provides recognition of exhibitors who provide equipment, materials or services that contribute to sustainable improvement of the environment. Entry is open to all SEMICON West 2010 exhibitors of commercially available equipment, materials or services that have been introduced into the market within the last 3 years. For more information, please contact Sanjay Baliga (SEMI Senior Manager in San Jose) at Tel +1.408.943.6957 or email sbaliga@semi.org. |
1:00pm-5:00pm |
The Chemical Mechanical Polishing Users Group (CMPUG), affiliated with the Northern California Chapter of the American Vacuum Society, will present the 4th Annual CMPUG Conference at SEMICON WEST 2010, with the title “New Frontiers for CMP.” The conference will provide an international forum for academic researchers, industrial practitioners and engineers from around the world for the exchange of information on state-of-the-art research in CMP technology, with emphasis on new materials and 450-mm wafer polishing. Submission of an abstract (a minimum of 200 words) is requested. Please send abstracts to either David A. Hansen, davidh_612@yahoo.com, or Ashwani Rawat, ashwani.k.rawat@intel.com, for consideration. |
Thursday, July 15
11:00am-3:00pm |
The Junction Technology Group, affiliated with the Northern California Chapter of the American Vacuum Society, plans to present a program of speakers on new implant, annealing and metrology products and process related to the formation of junctions and other doped and strained regions in semiconductor devices. |
