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3DIC at SEMICON West 2010

In the pursuit of building more functionality into ever-shrinking silicon real estate, device designers and manufacturers have crossed into the third dimension. 3DIC technologies have jumped to the forefront of innovation in the microelectronics industry, touching every aspect of the supply chain from design to final test, with each step and process presenting unique challenges and opportunities.

3DIC technology is in the spotlight at SEMICON West 2010, with technical sessions, keynote presentations, and exhibitors all dedicated to products, technologies, and solutions for 3DIC, including design, device fabrication, packaging, and test.

3DIC Sessions and Events at SEMICON West 2010

ASMC 2010

 

Keynote: Matt Nowak, Qualcomm
High Density 3D Through Silicon Stacking – Manufacturing Readiness and Challenges

TechXPOT Sessions (Location: North Hall)

 

Packaging Session: “Bridging the Gap”
Tuesday, July 13
10:30am–12:30pm

 

Packaging Session: “Diving into Deep Submicron- Swimming the Channel”
Tuesday, July 13
2:00pm–4:30pm

TechSITE Session (Location: North Hall)

 

3DIC Co-Design Challenges: How to Speed 3DIC Deployment
Tuesday, July 13
2:00pm–4:30pm

IMAPS/SEMI Workshop

 

Advanced Interconnect Technology Workshop
Wednesday, July 14
8:00am–5:00pm

Standards

 

SEMI/SEMATECH Presents: 3D Interconnect Challenges and Need for Standards Workshop
July 13, 2010
1:00pm–5:00pm
San Francisco Marriott Marquis

 

SEMATECH Workshop on 3D Interconnect Metrology
Wednesday, July 14


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